Taken from Electic Tech
http://www.electic.com/cgi-bin/news/News/Stories/2001/10/15/10031689651.shtml
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DDR333 has hit the shelves of Micron. DDR333 is the next next speed step in the DDR SDRAM products family. With a 167 MHz clock, DDR333 provides a 333Mb/sec (PC2700 for x64 DIMMs) data rate and is also backwards compatible with DDR200 and DDR266. Micron will be providing further information and samples to their customers soon. Here are the specs of the part Micron will be dishing out:
-167 MHz Clock, 333 MHz data rate
-VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V
-Bidirectional data strobe (DQS) transmitted/ received with data, i.e., source-synchronous data capture (x16 has two - one per byte)
-Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle
-Differential clock inputs (CK and CK#)
-Commands entered on each positive CK edge
-DQS edge-aligned with data for READs; center-aligned with data for WRITEs
-DLL to align DQ and DQS transitions with CK
-Four internal banks for concurrent operation
-Data mask (DM) for masking write data (x16 has two - one per byte)
-Programmable burst lengths: 2, 4, or 8
-Concurrent Auto Precharge option supported
-Auto Refresh and Self Refresh Modes
-FBGA package available
-2.5V I/O (SSTL_2 compatible)
-tRAS lockout ( tRAP = tRCD)
-Backwards compatible with DDR200 and DDR266
