New Member
hence the post count of "1"

FSB stands for front-side bus it is the measurement (in megahertz) of the number of clockcycles that performed over the bus in a second... in the GTL+ bus (the one that the p3's use) the fsb is set at 66mhz, 100mhz, or 133mhz (the ram runs at full speed, the agp runs at 1/1, 2/3, or 1/2 respectively -- always 66mhz unless you o/c -- and the pci bus runs at 33mhz...
in the EV-6 bus (the athlon and DEC alpha one) the bus is operated at 200mhz because it is a DDR double-data rate bus... the ram & components still run at normal speed (ram - 100mhz, agp - 66mhz, pci 33mhz, and, sigh, isa - 16mhz)

hope this helped somewhat!

Sub-zero project status: working on v0.01 alpha stage design


New Member
thanx to the more than satisfying answer Machupo.
- hence the post count of 1