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  1. #1
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    Random question

    What's the point of having a 550mhz (or 450...or 400...or whatever) processor if you can only get data to it at 100mhz across the bus? Shouldn't the bus run faster since it not only has to keep the processor busy, but also keep things going to and from RAM, video, hard drive controllers, network cards, modems, etc?

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  2. #2
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    Im going to try to answer this one as fully as I possibly can. Let me know if I miss anything important people...

    Egg, the reason is that the processor does not spend all its time reading and writing from the main memory, cards or drives. Infact, often once the processor reads and writes a chunk of data to cache, it could spend thousands of cycles just processing it before making another read or write to memory/HDD. Cache is what makes it easier to process faster without increasing the bus speed. Most items in your computer have some cache, some more than others, which makes it easier for all these drives to work optimally on a shared bus.

    Drives, modems and network cards can rarely eat up bandwidth because their maximum transfer rates are often very low. Keep in mind that the PCI bus has a maximum transfer rate of 133MB/s. For example: your average IDE hard drive can transfer less than 5 MB/sec sustained due to the drive's physical limitation. Modems usually stream less than .1MB/s over the bus. Ethernet NICs can stream either 1.2MB/s or 12.5MB/s PEAK, but realize that real transfer rates can be much lower, especially for larger networks; and realize that youre almost NEVER transmitting or recieving that much data continuously. As you can see, even with all these devices combined, you dont come anywhere near half the bandwidth the PCI bus is capable of.

    Even the 3d video card, most of the time, does not saturate the bus with loading of textures and triangle data. The biggest bandwidth eater is texture streaming, but if most of the textures neded can fit in the card's local memory (yet another "cache"), this problem is largely avoided.

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  3. #3
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    That was a pretty excellent reply.

    The only thing i can add is this: The basis for most modern processors (at least on Intels GTL+ bus), is that operations can be better performed in smaller tasks, rather than one large one. When the processor recieves an instruction, it often breaks it down into simpler instructions for processing. In that manner, as MadCat said, you could easily spend many processor cycles performing a single instruction. Now, im not too fully up to date on this yet, but im pretty sure that AMDs EV6 bus and Intels GTL+ bus perform this slightly differently. The EV6 has a slightly different way of doing it, i think. I should go read up on that.

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    "In the computer industry, there are three kinds of lies;
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  4. #4
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    To answer your question, yes, speeding up the bus does help, but it doesn't need to be up to full processor speed. Like MadCat said, cache helps keep the processor from accessing the memory all the time. Also, some instructions take more than one clock to complete.

    GTL+ and EV6 bus have nothing to do with how the instructions are broken up and processed. However the EV6 is point to point, which I think is similar to the differece between a switch and a hub. The GTL+ is like a hub and only has 100Mhz of bandwidth that can be used at a time, and the EV6 is like a switch where if device1 is accessing device2, and device3 is accessing device 4, both of those connections get 200Mhz (or whatever the bus speed is set at). The GTL+ bus is old technology and Intel is running into real problems pushing it any faster, that's why the system bus speed has been slow to increase.

  5. #5
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    Uh oh, i can smell this starting to turn into another "Why Athlon is better" debate.

    Essentially, thats correct. Athlons use of multiple processors is better, but thats not the issue here. (In fact, comparing it to a switch is inaccurate, as each processor in a K7 system can use a full 1.6GB/sec simultaneously, no switching involved.) In answer to the original question, Intels, as well as AMDs, current BUS / CPU / whateveryouwanttocallit architecture makes use of simplified instructions, which is why the CPU can operate at significantly higher speeds than the system BUS, and still be useful.

    ------------------
    "In the computer industry, there are three kinds of lies;
    lies, damn lies, and benchmarks."
    "In the computer industry, there are three kinds of lies;
    lies, damn lies, and benchmarks."

  6. #6
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    For single processor systems, there is almost no difference between the two bus protocols. Certainly, they have different top speeds, but overall they will perfroma similarly in a single-processor machine. Now, add in another processor (or 3 more) and we start to see the obvious advantage of the EV6 bus. The EV6 is far superior to GTL+ with SMP. And since we are obviously moving toward SMP for ALL sectors of the market, not just servers and highend workstations, I expect Intel toeither adopt EV6 (not likely) or introduce something that either copies EV6 or improves it. The shared processor bus architecture can only get you so far in SMP.

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  7. #7
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    "Introduce something that either copies EV6 or improves it."

    Ahh, yes.. Silicon plagarism. Copying each other's innovations has worked well for both companies, has it not? AMD copies MMX, Intel copies 3Dnow. If this competition keeps up, pretty soon we will be running something as powerful as a CRAY on our desktop for under $1000...

    >big cheesy grin< I like power.

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  8. #8
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    The truth is, Dark, that for years now the common desktop computer can outperform a Cray1 super computer. SGI owns Cray now, and they all use MIPS processors now. MIPS has a great instruction set, but the processors lack the spark of ingenuity that x86 processors have been driving. Plus, SGI systems are overpriced. FTLG (For the love of God) 20 grand for a workstation!?

    Although, I do have to put my two cents in about x86 processors and the whole bus fiasco. Sure the current system works, but I've always been disappointed with 8 (really 6 if you want to use a stack at all!) general purpose 32 bit integer registers. MIPS and Alphas both have 32 64 bit integer registers and 32 double precision floating point registers. If an x86 processor had those, things would be a lot different!
    And what also sucks is the MMX registers. They are 64 bit registers, but they only work on packed data and can't do arithmetic with real 64 bit values. *Intel* Gee, why would anyone want to divide 64 bit integers?

    At any rate, I've said too much.

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  9. #9
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    "The truth is, Dark, that for years now the common desktop computer can outperform a Cray1 super computer."

    Cray 1 is their 1st gen comp from a few years back, right? Ok.. I can get with that.. I guess WOW.

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  10. #10
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    Ok...that makes sense...

    The advantage of the Crays, as with all servers, is not the processing power, but the ability to connect multiple people to it. IBM's RS/6000 silver nodes can handle 2000 clients at a time or something ungodly like that...and they use the same processors that macintosh is using! (granted there are 8 processors per node) hmm...quake2 frame rate on an 8 processor machine...oh wait different topic...

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