NVIDIA GeForce3 Technology Preview

Although NVIDIA GPUs have been the highest performing on the market, their memory bandwidth limitations have come under increased scrutiny. Even utilizing high-speed DDR memory, the GeForce2 line of cards have been memory bandwidth limited at higher resolutions and color depths. NVIDIA has obviously listened to these comments and have offered several enhancements designed to alleviate the ever-increasing strain on the memory bus.

Higher Order Surfaces

When displaying highly detailed 3D objects, such as those using curved surfaces, the triangle count can reach astronomical levels. This gets worse as the detail increases and places a huge load on both the GPU and its memory bandwidth. The concept of Higher Order Surfaces is an attempt to move away from pure triangle setup into a method of defining objects through a series of control points, or splines. These splines are sent to the GPU, which then extrapolates these small formulas and displays the results. By only transferring the "higher order" formulas to the GPU, rather than the raw geometric data, it results in a much greater efficiency with the potential benefit of higher quality images.

Crossbar Memory Controller

With the increasing load new 3D applications are placing on the memory bus and framebuffer, every portion of the memory transfer process must operate at peak efficiency. Previously, bandwidth returns were achieved by increasing the memory clock speed and enlarging the memory framebuffer. Once the GeForce2 Ultra hit 460 MHz memory clock speeds with 7.3 GB/sec of memory bandwidth, it became clear that alternatives to the hardware options should be explored.

The video card's memory controller is one area that seems to be ripe for improvement. After all, it controls the framebuffer access and any inefficiency there would be passed on to overall card performance. True to its name, the GeForce3's Crossbar Memory Controller implements four independent memory controllers that interact with each other and the GPU. This allows each of the memory controllers to handle smaller pieces of data and increase efficiencies by essentially sharing the total memory bandwidth. If one or more of the memory controllers are busy, then the others are still free to transfer data to and from the GPU.